1. Field of the Invention
The present invention generally relates to a sawtooth generator and a signal interpolating apparatus using the same and, more particularly, to a sawtooth generator for generating a sawtooth wave whose amplitude linearly changes in correspondence with a phase change of an input signal having phase information and a signal interpolating apparatus using this sawtooth generator to generate an interpolation signal which repeats the same pattern once for each predetermined change in phase of the input signal.
2. Description of the Related Art
In using an input signal upon specifying a phase position thereof, e.g., in transmission of the input signal through mechanical rotation to set operating conditions such as the frequency and level of an electronic or optical device, it is often convenient to process data upon converting a phase change into a linear level change on the basis of two sinusoidal signals A(.theta.) and B(.theta.) changing with their phases .theta. representing rotational positions being shifted by 90.degree., as compared with direct processing of the phase information. A strong demand has arisen for a simple, high-speed apparatus for finely setting the operating conditions of such an electronic device.
In particular, the present invention relates to a sawtooth generator and a signal interpolating apparatus, which give considerations to the response speed, linearity, and apparatus size in converting a phase into a level to realize the above applications.
Generation of a sawtooth wave or interpolation signal upon reception of two sinusoidal signals A(.theta.) and B(.theta.) whose phases .theta. are shifted by 90.degree. is conventionally performed by an apparatus called an encoder for converting, e.g., mechanical rotation into an electrical signal as phase information and outputting the phase information. The following conventional encoders are available.
(1) Sawtooth Generator and Signal Interpolating Apparatus of Arc Tangent Scheme PA0 (2) Signal Interpolating Apparatus by Resistance Division Scheme PA0 (3) Signal Interpolating Apparatus by Interpolation Table Scheme PA0 (1) Sawtooth Generator and Signal Interpolating Apparatus of Arc Tangent Scheme PA0 (2) Signal Interpolating Apparatus by Resistance Division Scheme PA0 (3) Signal Interpolating Apparatus by Interpolation Table Scheme PA0 1 Means for Generating Sawtooth wave Whose Level Linearly Increases or Decreases Over Wide Phase Range PA0 2 Signal Interpolating Apparatus
According to this scheme, the values (arc tangent values) of the phases .theta. of two sinusoidal signals A=sin.theta. and B=cos.theta. whose phases .theta. are shifted by 90.degree. are obtained, and a sawtooth value is output using a ramp portion which approximately linearly changes. A pulse is generated at a position corresponding to the sawtooth value. As a result, a pulse train as a series of pulses is output. For example, a technique disclosed in Jpn. Pat. Appln. KOKAI Publication No. 4-290312 is available and generally described in FIG. 9. According to this technique, tan.theta. and cot.theta. are obtained from two sinusoidal signals A=sin.theta. and B=cos.theta. whose phases are shifted by 90.degree., and pulses are output. Note that no explicit description is made for the process of outputting the pulses from tan.theta. and cot.theta., but the .theta. values of the linear portion within the non-divergent range of tan.theta. and cot.theta. are used.
More specifically, referring to FIG. 9, a pair of first and second detectors 11a and 11b are arranged near the positions of a code plate 10 having codes 10a constituted by slits or the like. A sinN.theta. signal as an A-phase analog signal obtained from the first detector 11a is input to a first A/D converter 13a through a first amplifier 12a.
A cosN.theta. signal as a B-phase analog signal obtained from the second detector 11b is input to a second A/D converter 13b through a second amplifier 12b. The first and second digital signals obtained from the A/D converters 13a and 13b are input to a divider 14.
The sinN.theta. and cosN.theta. signals are divided by the divider 14 as follows.
That is, divisions cosN.theta./sinN.theta.=cotN.theta. and sinN.theta./cosN.theta.=tanN.theta. are calculated to obtain relative values A and B of the sinN.theta. and cosN.theta. signals.
The amplitude variations of the sinN.theta. and cosN.theta. signals in the above divisions are canceled as follows.
Assume that the amplitudes of the sinN.theta. and ConN.theta. are defined as A and B, respectively, to give AsinN.theta. and BcosN.theta., and the amplitudes are adjusted to establish A=B.
Assuming that the drifts of sinN.theta. and cosN.theta. upon temperature changes and passage of time are defined as .DELTA.V.sub.A and .DELTA.V.sub.B, respectively, .DELTA.V.sub.A .apprxeq..DELTA.V.sub.B is established. At this time, sinN.theta. and cosN.theta. become (A+.DELTA.V.sub.A)sinN.theta. and (B+.DELTA.V.sub.B)cosN.theta.. Direct use of the A/D data of these signals causes an increase in error. For this reason, sinN.theta. and cosN.theta. are divided to obtain (A+.DELTA.V.sub.A)sinN.theta./(B+.DELTA.V.sub.B)cosN.theta.=tanN.theta. (because A+.DELTA.V.sub.A .apprxeq.B+.DELTA.V.sub.B). Therefore, the amplitude variations can be canceled.
The relative values tanN.theta. and cotN.theta. are two phase signals free from variations because the variations in ambient temperature, frequency, and the like are canceled. These relative values are extracted as an output signal through an up/down circuit 15 and a counter 16.
The prior art shown in FIG. 9 is related to a method of interpolating an encoder signal. More specifically, the sinN.theta. and cosN.theta. signals as analog signals are divided to calculate a relative value to obtain a high-precision digital signal free from the variations in ambient temperature or frequency. For this purpose, in the method of interpolating the encoder signal wherein sinN.theta. and cosN.theta. signals are extracted from N codes formed on the code plate to convert these signals into digital signals by A/D converters, the digital signals are divided to obtain the relative values of the sinN.theta. and cosN.theta. signals.
As shown in FIG. 10, a signal interpolating apparatus of this scheme sequentially obtains signals, whose phases are shifted by a predetermined value, from a sum of the vectors of two sinusoidal signals A=sin.theta. and B=cos.theta. . The resultant signals are exclusively ORed to obtain an interpolation signal.
More specifically, FIG. 10 shows a technique associated with an interpolating.multidot.digital circuit for interpolating a measurement signal, as described on pages 8, 9 in the complete catalog of HEIDENHAIN Co., Ltd. of Japan.
In this interpolating.multidot.digital circuit, scanning signals I.sub.e1 and I.sub.e2 shown in FIG. 11A are amplified and then interpolated. As shown in FIG. 11B, a resistance circuit (R) for additionally generating a phase difference signal upon addition of the vectors of the two sinusoidal signals is used in this signal interpolation. FIG. 10 shows the details of this circuit and the phases of five times interpolation.
In the illustrated example, a part of 10 signals having phases from 0.degree. to 162.degree. is shown. These signals are converted into rectangular signals and combined into two rectangular pulse trains by two exclusive OR (XOR) gates. As shown in FIG. 11C, the frequencies of output signals U.sub.a1 and U.sub.a2 are higher than those of the input signals by five times and phase-shifted by 1/4 the period of the signal having a higher frequency of the two. A reference mark signal U.sub.a0 is gated between two continuous edges of the output signals U.sub.a1 and U.sub.a2.
The four signal edges of U.sub.a1 and U.sub.a2 are used as count pulses during one signal period.
The distance between the two output signals U.sub.a1 and U.sub.a2 is one measurement pitch which is 1/20 the scale graduation interval.
As shown in FIG. 12, this scheme is a method in which two sinusoidal signals A=sin.theta. and B=cos.theta. are converted into digital data, and the angular position of an encoder which corresponds to the digital data is obtained from an interpolation table (memory) prepared using the digital data in advance, thereby generating a pulse using this position.
That is, the scheme in FIG. 12 is a technique also described in the above complete catalog.
In this case, two original signals I.sub.e1 and I.sub.e2 from, e.g., light-receiving elements are amplified and converted into analog voltages. These voltages are held in sample/hold circuits (S/Hs) and converted into digital signals by A/D converters at regular intervals (clocks).
The instantaneous position values within one signal period are generated in the interpolation table (IT) using these two digital voltage values. The tracking circuit TC compares each instantaneous position value with the value obtained in the previous cycle. The tracking counter TC generates 0.degree. and 90.degree. signals from the difference of these two position values.
Incremental rectangular signals U.sub.a1 and U.sub.a2 appear from the output stage of the tracking circuit TC.
The following drawbacks are found in the above three conventional techniques.
According to this scheme, the arc tangent values include divergent components depending on the values of the phases .theta., so that the approximately linear portion is narrow when the approximately linear portion is to cover a phase .theta. range of 360.degree., the arithmetic volume is very large. For this reason, the measurement values are generally converted into digital values by A/D converters, and the arithmetic operation of these digital values is performed by a CPU. The response speed of an output upon a change in phase .theta. thus depends on the CPU. The technique described in Jpn. Pat. Appln. KOKAI Publication No. 4-290312 is also assumed to be dependent on a CPU. To increase the arithmetic speed by a CPU, a high-speed CPU must be used. In addition to such a CPU, a program, a ROM, and a RAM are required.
According to this scheme, the degree of interpolation is limited to 20 repetitions of the output signal for a single repeated value of the phase .theta..
According to this scheme, since data are directly read out from the interpolation table (memory) using the digital data obtained by converting two sinusoidal signals A=sin.theta. and B=cos.theta., poor linearity of the converted digital data is directly reflected on the final results. Although linearity may be compensated on the interpolation table side, the interpolation table is overloaded, and interpolatable linearity has limits.